邓小莺 副教授

  • 办公室:N823
  • 导师类别:
  • E-mail:dengxy@szu.edu.cn
  • 办公电话:2267-3391
个人详情

邓小莺,东南大学工学博士,2011年入职深圳大学,硕士生导师。主要从事集成电路设计领域的科研和教学工作。近年来主持国家自然科学基金、广东省自然科学基金及深圳市基础研究项目多项。在国内外重要学术期刊和会议发表三大检索论文几十篇。担任IEEE Trans. on Circuit& System I、 IEEE Trans. on VLSI、International Journal of Electronics等期刊审稿人。指导学生参加集成电路设计领域竞赛,多次获得国家级奖项。


研究兴趣:锁相环、振荡器等时钟产生/同步电路、非易失性存储电路、数模混合电路等大规模集成电路设计及信号完整性


教授课程:VLSI设计导论、数字集成电路设计、数字系统设计、场论与复变函数等


研究生招生方向:集成电路设计



近五年主持科研项目清单:

1.国家自然科学基金青年基金,61404087,超级动态电压调节技术下的信号完整性关键技术研究,2015/01-2017/12,23万元,主持

2.广东省自然科学基金面上项目,2020A1515011482,面向5G通信的CMOS锁相环级联毫米波频率合成器关键技术研究,2019/10-2021/09,10万元,主持

3.深圳市科技创新计划基金,JCYJ 20200813135807001,面向自动驾驶的FPGA高精度时间同步系统关键技术研究,2020/09-2023/09,30万元,主持

4.深圳市科技创新计划基金,JCYJ20160520174014465,高密度超低能耗新型嵌入式随机存储器关键技术研究,2016/10-2019/09,20万元,主持

5.深圳市科技创新计划基金,JCYJ20140418193546102,超级动态电压调节技术下的串扰控制关键研究,2014/09-2016/09,10万元,主持

6.深圳市科技创新计划基金,JCYJ20120613104353889,超级动态电压调节技术下的高性能全数字锁相环研究,2012/09-2015/03,10万元,主持



部分期刊论文:

1.Xiaoying Deng, Zhenyu Jiang,Mingcheng Zhu. A Novel Group-Division Multiplexing Complementary Symmetric Reference Sensing Scheme for MRAM,IEEE Transactions on Circuits and Systems II: Express Briefs,71(9):4281-4285,2024.

2.Xiaoying Deng, Tao Xu. High-Speed, Energy-Efficient Magnetic Nonvolatile Flip-Flop With Self-Adaptive Write Circuit Utilizing Voltage-Controlled Magnetic Anisotropy, IEEE Transactions on Magnetics, 57(5):1-8,2021.

3.Xiaoying Deng, Peiqi Tan. An Ultra-Low-Power K-Band 22.2 GHz-to-26.9 GHz Current-Reuse VCO Using Dynamic Back-Gate-Biasing Technique, Electronics,10(8):1-11,2021.

4.Bai Chunfeng, Wu Jianhui, Chen Chao, Deng Xiaoying, A 35-dBm OIP3 CMOS Constant Bandwidth PGA With Extended Input Range and Improved Common-Mode Rejection, IEEE Transactions on Circuits and Systems II: Express Briefs, 64(8):922-926,2017.

5.Deng Xiaoying, Lin Xin, Zhu Mingcheng. A 0.23mW self-biased current-reuse CMOS LC-VCO based on novel interposed network, IEICE Electronics Express, 14(20): 1-9,2017.

6.Xiaoying Deng, Yanyan Mo. A Novel Boost Bulk-Driven Sense-Amplifier Flip-Flop operating in Ultra Wide Voltage Range,Electronics letters,51(9): 680-682, 2015.

7.Xiaoying Deng, Jun Yang, Jianhui Wu. Jitter and phase noise of ADPLL due to PSN with deterministic frequency. International Journal of Electronics, 98(9):1259-1268, 2011.

8.Xiaoying Deng, Jun Yang, Jianhui Wu. Contributions to the analysis of deterministic noise on ADPLL jitter performance. Analog Integrated Circuits and Signal Processing, 67(3):331-338, 2011.




代表性会议论文:


1.Xiaoying Deng, Lan,Simin. Design of IEEE 1588 Hardware Timestamp Unit Based on TDC,International Conference on Computer and Communication Systems(ICCCS),304-308,2024

2. Binnuo Li, Liang Luo, Xiaoying Deng*. A 13.4-31.8-GHz Single-core Dual-mode VCO with Mode-independent Transformer-switching Technique in 55nm CMOS, IEEE International Conference on Circuits and Systems, 171- 175,2024.

3.Xiaoying Deng, Linsen Xie.A 21.2-23-GHz Ultra-Low-Power Injection-Locked Frequency Tripler Using Current-Reuse Structure,IEEE International Conference on Circuits and Systems,51-54,2021.

4.He Xiao, Xiaoying Deng,Mingcheng Zhu.Modeling Simulation and Circuit Implementation of Millimeter Wave Phase-Locked Loop Based on Simulink.IEEE International Conference on IC Design and Technology,1-4,2019

5.Xiaoying Deng, Yanyan Mo, Mingcheng Zhu. Low-Jitter All-Digital Phase-Locked Loop with Novel PFD and High Resolution TDC &DCO, IEEE International System on Chip Conference,1-6,2016.

6.Xiaoying Deng,Yanyan Mo,Jianhui Ning. A Novel Sense-Amplifier Based Flip-Flop with Bulk-Driven Technique, IEEE CSTIC 2015, pp. 1-3, 2015.

7.Xiaoying Deng, Xin Lin, Yanyan Mo, Mingcheng Zhu. Analysis of phase noise in CMOS ring oscillator due to substrate noise. IEEE DCAS 2015, pp. 1-4, 2015.


专著:

1.周生明,邓小莺,马芝等。基于ZENI的集成电路设计与实现技术,西安电子科技大学出版社,2013.10.

2.邓小莺,汪勇,何业军。无源 RFID 电子标签天线理论与工程,清华大学出版社,2016.5.



教材:

1.邓小莺,初萍,王娜。复变函数与场论简明教程习题指导,西安电子科技大学出版社,2015.12.



专利:

1.邓小莺,莫妍妍,宁建辉,刘柳。“一种由衬底控制的D触发器”,中国国家专利局,专利号:201420239226.2,授权。

2.邓小莺,林鑫,姜梅,朱明程。“一种低纹波开关电容共模反馈结构”,中国国家专利局,专利号:201510765104.6,授权。

3.邓小莺,林鑫,朱明程。“一种延迟模块和多路环形振荡器”,中国国家专利局,专利号:201620024806.9,授权。

4.邓小莺,赖科; 蔡良伟; 朱明程。“ 一种提高读写稳定性的存储单元电路与存储装置”,中国国家专利局,专利号:CN201810798035.2,授权。

5.邓小莺,谭沛琪,朱明程。“一种压控振荡器、压控振荡处理方法及电子设备”,中国国家专利局,专利号:CN20210301205.2,授权。



获奖信息:

深圳大学第四届青年教师讲课竞赛三等奖



办公室:N823

办公电话:2267-3391

E-mail:dengxy@szu.edu.cn


2025/4/15